Multiprocessor systems, that is, systems employing two or more microprocessors, can be used for a variety of computing tasks. Often featuring specialized hardware, operating systems, and/or application software, multiprocessor systems are available in several different forms.
Symmetric multiprocessing (SMP) is the use of multiple microprocessors managed by a single operating system. Each microprocessor has access to the same memory and is linked by a common bus. In some SMP systems, each microprocessor has its own cache, and cache coherency problems may be resolved using bus snooping and bus mastering techniques.
Massively parallel processing (MPP) is another multiprocessing environment, in which each processor or group of processors on a system has its own memory and operating system. A single application program may simultaneously be executed by the different microprocessors. Certain applications, such as relational database software, may realize significant gains in throughput using MPP. Still other MPP systems may operate multiple application programs simultaneously, one program executed by each microprocessor or group of microprocessors. A combination of SMP and MPP schemes is also possible within a multiprocessing system.
A single chassis of a multiprocessor system may be able to simultaneously support multiple domains. A domain results from the partitioning of a multiprocessor system into two or more independent microprocessor-based subsystems. Each domain is a discrete entity within the system, which includes at least one microprocessor, and may include dedicated memory, input/output (I/O) devices, and other modules, such that the domain operates wholly independent of other domains, yet occupies the same system enclosure, which may include one or more chassis. The independent operations include the execution of programs such as firmware, to initialize the domain, operating system (OS), to run in the domain, and application software, also to run in the domain.
To support partitioning, the system board or boards, which are enclosed within a single chassis, may include multiple chipsets such that, when partitioning is invoked, a dedicated portion of the chipset operates within each domain. When the system is unpartitioned, the combined parts of the chipset may be accessible to all the microprocessors. Although physically present, a part of the chipsets may be dormant, or unused, in the unpartitioned state.
As one option, the various chipset components, buses, slots, and connectors within the partition-capable computer system may be replicated, one for each domain. Such redundancy may not be cost-effective for some applications. Further, the partitioning of a partition-capable system is often an optional feature, such that the system is expected to seamlessly transition between and operate within either a single-domain system or a multi-domain system.
Like server and other high-end systems, partitionable computer systems are produced using legacy (personal computer compatibility) hardware and initialization firmware, sometimes for cost savings, but more often to maintain backwards compatibility with software that expects to see legacy hardware interfaces. Examples of legacy hardware include the interrupt controller, timer, reset hardware, and various other devices that only support a fixed address decode. Legacy firmware is firmware executed during system initialization that requires the presence of the legacy hardware. This includes the firmware boot interrupt control sequence, reset and initialization sequences, and so on. Some of the legacy functionality may conflict with the partitioning of the multiprocessor system.
Thus, there is a continuing need to provide a partitionable multiprocessor system that overcomes the shortcomings of the prior art.